1T or F: Both the structure and functioning of a computer are, in essence, simple.
True
2T or F: The number of bits used to represent various data types is an example of an architectural attribute.
True
3T or F: Interfaces between the computer and peripherals are an example of an organizational attribute.
True
4T or F: The hierarchical nature of complex systems is essential to both their design and their description.
True
5An I/O device is referred to as a __________.
Peripheral
6The _________ stores data.
Main memory
7T or F: Computer organization refers to attributes of a system visible to the programmer.
False
8A common example of system interconnection is by means of a __________.
System Bus
9_________ attributes include hardware details transparent to the programmer.
Organizational
10T or F: A computer must be able to process, store, move, and control data.
True
11T or F: A microcomputer architecture and organization relationship is not very close.
False
12T or F: When data are moved over longer distances, to or from a remote device, the process is known as data transport.
False
13The __________ performs the computer's data processing functions.
ALU
14Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.
Architecture
15It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.
Organizational
16A _________ is a mechanism that provides for communication among CPU, main memory, and I/O.
System interconnection
17A __________ system is a set of interrelated subsystems.
Hierarchical
18_________ provide storage internal to the CPU.
Registers
19When data are moved over longer distances, to or from a remote device, the process is known as __________.
Data communications
20T or F: A particular architecture may span many years and encompass a number of different computer models, its organization changing with changing technology.
True
21T or F: Changes in computer technology are finally slowing down.
False
22T or F: Changes in technology not only influence organizations but also result in the introduction of more powerful and complex architectures.
True
23T or F: Both the structure and functioning of a computer are, in essence, simple.
True
24The __________ moves data between the computer and its external environment.
I/O
25Architectural attributes include __________.
I/O Mechanisms
26T or F: Historically the distinction between architecture and organization has not been an important one.
False
27It is a(n) _________ design issue whether a computer will have multiple instructions.
Architectural
28T or F: A computer organization does not need to be designed to implement a particular architectural specification.
False
29T or F: A computer is a complex system.
True
30Computer technology is changing at a __________ pace.
Rapid
31T or F: Processors are so inexpensive that we now have microprocessors we throw away.
True
32T or F: Measures such as MIPS and MFLOPS have proven adequate for evaluating the performance of processors.
False
33T or F: Superscalar execution is the same principle as seen in an assembly line.
False
34The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.
Multicore
35The best-known of the SPEC benchmark suites is __________.
Spec CPU2006
36T or F: Raw speed is far more important than how a processor performs when executing a given application.
False
37Multiple parallel pipelines are used in __________.
Superscalar execution
38The __________ measures the ability of a computer to complete a single task.
Speed metric
39T or F: A common measure of performance for a processor is the rate at which instructions are executed, expressed as millions of instructions per second (MIPS).
True
40A measurement of how many tasks a computer can accomplish in a certain amount of time is called a(n) __________.
Throughput
41T or F: Designers wrestle with the challenge of balancing processor performance with that of the main memory and other computer components.
True
42T or F: The raw speed of the microprocessor will not achieve its potential unless it is fed a constant stream of work to do in the form of computer instructions.
True
43One increment, or pulse, of a clock, is referred to as a __________.
Clock cycle
44T or F: A straight comparison of clock speeds on different processors tells the whole story about performance.
False
45T or F: Branch prediction potentially increases the amount of work available for the processor to execute.
True
46The interface between the processor and ___________ is the most crucial pathway in the entire computer because it is responsible for carrying a constant flow of program instructions and data between memory chips and the processor.
Main memory
47T or F: The cache holds recently accessed data.
True
48__________ law deals with the potential speedup of a program using multiple processors compared to a single processor.
Amdahl’s law
49An increase in clock rate means that individual operations are executed _____.
More rapidly
50___________ potentially increases the amount of work available for the processor to execute.
Branch prediction
51The desktop application(s) that require the great power of today's microprocessor-based systems include___________.
All of the above
52The __________ is a relatively small fast memory interposed between a larger, slower memory and the logic that accesses the larger memory.
Cache
53A __________ is a core designed to perform parallel operations on graphics data.
Gpu
54A(n) __________ Mean is a good candidate for comparing the execution time performance of several systems.
Arithmetic
55T or F: Workstation systems cannot support highly sophisticated engineering and scientific applications.
False
56T or F: Year by year the cost of computer systems continues to rise.
False
57T or F: The IAS is the prototype of all subsequent general-purpose computers.
True
58With respect to changes in values, the __________ Mean gives equal weight to all of the values in the data set.
Geometric
59T or F: Cloud service providers use massive high-performance banks of servers to satisfy high-volume, high-transaction-rate applications for a broad spectrum of clients.
True
60T or F: Operations performed by a processor, such as fetching an instruction, decoding the instruction, performing an arithmetic operation, and so on, are governed by a system clock.
True
61The __________ are used to designate the source or destination of the data on the data bus.
Address Line
62T or F: Because all devices on a synchronous bus are tied to a fixed clock rate, the system cannot take advantage of advances in device performance.
True
63T or F: With asynchronous timing the occurrence of events on the bus is determined by a clock.
False
64T or F: Interrupts do not improve processing efficiency.
False
65T or F: Computer systems contain a number of different buses that provide pathways between components at various levels of the computer system hierarchy.
True
66The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.
Transaction layer
67T or F: A key requirement for PCIe is the high capacity to support the needs of higher data rate I/O devices such as Gigabit Ethernet.
True
68T or F: An I/O module cannot exchange data directly with the processor.
False
69T or F: Timing refers to the way in which events are coordinated on the bus.
True
70The processing required for a single instruction is called a(n) __________ cycle.
Instruction
71A(n) _________ is generated by a failure such as power failure or memory parity error.
Hardware failure interrupt
72The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects.
Routing
73T or F: The basic function of a computer is to execute programs.
True
74Each data path consists of a pair of wires (referred to as a __________ ) that transmits data one bit at a time.
Lane
75T or F: It is not possible to connect I/O controllers directly onto the system bus.
False
76The von Neumann architecture is based on which concept?
All of the above
77A bus that connects major computer components (processor, memory, I/O) is called a __________.
System bus
78A sequence of codes or instructions is called __________.
Software
79The data lines provide a path for moving data among system modules and are collectively called the _________.
Data bus
80The interconnection structure must support which transfer?
All of the above
81A __________ is the high-level set of rules for exchanging packets of data between devices.
Protocol
82T or F: Program execution consists of repeating the process of instruction fetch and instruction execution.
True
83Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton.
John Von neumann
84T or F: The unit of transfer at the link layer is a phit and the unit transfer at the physical layer is a flit.
False
85T or F: A key characteristic of a bus is that it is not a shared transmission medium.
False
86A(n) _________ is generated by some condition that occurs as a result of an instruction execution.
Program interrupt
87T or F: In general, the more devices attached to the bus, the greater the bus length and hence the greater the propagation delay.
True
88T or F: The method of using the same lines for multiple purposes is known as time multiplexing.
True
89T or F: At the top level, a computer consists of CPU, memory, and I/O components.
True
90The TL supports which of the following address spaces?
All of the above
91__________ memory is the principal internal memory system of the computer.
Main
92T or F: When instruction execution involves fetching the instruction from memory and, during execution, accessing one or more data operands from one or more regions of memory, there is a dual locality of data spatial locality and instruction spatial locality.
True
93T or F: Principle of locality is also referred to as the locality of reference.
False
94For cache memory, _________ locality is traditionally exploited by keeping re-cently used instruction and data values in cache memory and by exploiting a cache hierarchy.
Temporal
95T or F: Computer memory exhibits perhaps the widest range of type, technology, organization, performance, and cost of any feature of a computer system.
True
96_________ locality is generally exploited by using larger cache blocks and by fetching items of anticipated use into the cache control logic.
Spatial
97The term __________ refers to whether memory is internal or external to the computer.
Location
98Internal and external memory capacity it typically expressed in terms of bytes.
Location
99__________ memory consists of peripheral storage devices that are accessible to the processor via I/O controllers.
External
100__________ refers to when an instruction is fetched from a unit of memory, it is likely that in the near future additional instructions will be fetched from that same memory unit.
Instructional temporial locality
101One assertion that locality is based on is that as a function of time, the prob-ability that a given unit of memory is referenced tends to change __________.
Locality
102T or F: Intuitively, the principle of locality makes sense.
True
103_________ is a method of accessing units of data in which the access must be made in a specific linear sequence.
Sequential Access
104T or F: External memory subsystems are directly accessible by the processor.
False
105For random access memory, __________ is the time from the instant that an address is presented to the memory to the instant that data have been stored or made available for use.
Access Time
106__________ is a random access type of memory that enables one to make a comparison of desired bit locations within a word for a specified match, and to do this for all words simultaneously.
Associative Access
107T or F: Many programs exhibit both temporal and spatial locality for both instruction and data access.
True
108T or F: A distinction among memory types is the method of accessing units of data.
True
109T or F: Cache is a form of external memory.
False
110T or F: The principle of locality reflects the observation that memory references by the processor tend to cluster for instructions but not for data.
False
111T or F: For internal memory, the unit of transfer is equal to the number of electrical lines into and out of the memory module.
True
112__________ refers to when a data location is accessed, it is likely that in the near future additional instructions will be fetched from that same memory unit.
Data temporial Locality
113T or F: Locality is based on the assertion that the correlation between immediate past and immediate future memory reference patterns is low, and increases as the time interval increases.
False
114Locality of __________ has a profound influence on both the organization of memory and on operating system memory management software.
Reference
115T or F: It has been found that data access patterns generally show a greater variance than instruction access patterns.
True
116__________ location reflects the tendency of a program to access data locations sequentially, such as when processing a table of data.
Spatial
117T or F: One of the assertions that locality is based on is that during any interval of time, a program references memory locations non-uniformly.
True
118T or F: A typical computer system is equipped with a hierarchy of memory subsystems, some internal to the system and some external.
True
119__________ is a design principle which means that copies of the same data unit in adjacent memory levels must be consistent.
Coherence
120For main memory, __________ is the number of bits read out of or written into memory at a time.
Unit of transfer
121_________ is the minimum unit of transfer between cache and main memory.
Block
122T or F: There is an additional time element for comparing tag fields for both associative and set-associative caches.
True
123T or F: The length of a line, not including tag and control bits, is the line size.
True
124_________ is a portion of a cache line that is used for addressing purposes.
Tag
125T or F: The main disadvantage of the write through technique is that it generates substantial memory traffic and may create a bottleneck.
True
126The __________ policy dictates that a piece of data in one cache is guaranteed to be also found in all lower levels of caches.
Inclusive
127T or F: Victim cache was originally proposed as an approach to reduce the conflict misses of direct mapped caches without affecting its fast access time.
True
128The _________ policy dictates that a piece of data in one cache is guaranteed not to be found in all lower levels of caches.
Exclusive
129The __________ cache is slower and typically larger than the L2 cache
L3
130T or F: Cache design for high-performance computing is the same as it is for other hardware platforms and applications.
False
131T or F: The evolution of cache organization is seen clearly in the evolution of Intel microprocessors.
True
132T or F: The key advantage of the split cache design is that it eliminates contention for the cache between the instruction fetch/decode unit and the execution unit.
True
133T or F: One of the disadvantages of a direct-mapped cache is that it allows simple and fast speculation.
False
134T or F: A logical cache stores data using virtual addresses.
True
135The _________ execute micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers.
Execution Units
136If a program happens to reference words repeatedly from two different blocks that map into the same line, the blocks will be continually swapped in the cache, and the hit ratio will be low, is a phenomenon known as __________.
Thrashing
137With __________ additional hardware is used to ensure that all updates to main memory via cache are reflected in all caches.
Hardware transparency
138The __________ replacement algorithm replaces the block in the set that has been in the cache longest with no reference to it.
LRU
139T or F: FIFO is the most popular replacement algorithm.
False
140__________ is easily implemented as a round-robin or circular buffer technique.
FIFO
141T or F: With the exception of smaller embedded systems, all modern computer systems employ one or more layers of cache memory.
True
142T or F: The L1 cache is slower and typically larger than the L2 cache.
False
143The principal disadvantage of _________ mapping is the complex circuitry required to examine the tags of all cache lines in parallel.
Associative
144The _________ replacement algorithm replaces the block in the set that has been in the cache longest.
Fifo
145T or F: Associative mapping overcomes the disadvantage of direct mapping by permitting each main memory block to be loaded into any line of the cache.
True
146The __________ fetches program instructions in order from the L2 cache, decodes these into a series of micro-operations, and stores the results in the L1 instruction cache.
Fetch/decode unit
147T or F: The direct mapping technique is simple and inexpensive to implement.
True
148T or F: The cache contains a copy of portions of the main memory.
True
149The simplest technique for logically organizing cache is __________.
Direct mapping
150T or F: A number of chips can be grouped together to form a memory bank.
True
151T or F: The two traditional forms of RAM used in computers are DRAM and SRAM.
True
152With __________ the data transfer is synchronized to both the rising and falling edge of the clock, rather than just the rising edge.
DDR DRAM
153T or F: The advantage of RAM is that the data or program is permanently in main memory and need never be loaded from a secondary storage device.
False
154A __________ contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it.
ROM
155T or F: Nonvolatile means that power must be continuously supplied to the memory to preserve the bit values.
False
156T or F: NOR memory is better suited for external memory such as USB flash drives and memory cards.
False
157T or F: All DRAMs require a refresh operation.
True
158One distinguishing characteristic of memory that is designated as _________ is that it is possible to both read data from the memory and to write new data into the memory easily and rapidly.
RAM
159__________ increases the data transfer rate by increasing the operational frequency of the RAM chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip.
Ddr2
160__________ can be caused by harsh environmental abuse, manufacturing defects, and wear.
Hard Errors
161T or F: Flash memory is only used for internal memory applications.
False
162Theoretically, a DDR module can transfer data at a clock rate in the range of __________ Mbps.
200 to 400
163__________ is a good candidate to replace or supplement DRAM for main memory.
PCRAM
164T or F: DRAM is much costlier than SRAM.
False
165T or F: A characteristic of ROM is that it is volatile.
False
166The _________ exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without imposing wait states.
SDRAM
167T or F: Semiconductor memory comes in packaged chips.
True
168T or F: RAM must be provided with a constant power supply.
True
169T or F: The SDRAM performs best when it is transferring large blocks of data sequentially such as for word processing, spreadsheets, and multimedia.
True
170_________ can be caused by power supply problems or alpha particles.
Soft errors
171With _________ the microchip is organized so that a section of memory cells are erased in a single action.
Flash Memory
172A DDR3 module transfers data at a clock rate of __________ Mbps.
800 to 2133
173T or F: A static RAM will hold its data as long as power is supplied to it.
True
174In a _________, binary values are stored using traditional flip-flop logic-gate configurations.
SRAM
175________ increases the prefetch buffer size to 8 bits.
DDR3
176T or F: An error-correcting code enhances the reliability of the memory at the cost of added complexity
True
177T or F: The basic element of a semiconductor memory is the memory cell
True
178T or F: The width of a track is double that of the head.
True
179The disadvantage of _________ is that the amount of data that can be stored on the long outer tracks is only the same as what can be stored on the short inner tracks.
CAV
180The areas between pits are called _________.
Lands
181T or F: A removable disk can be removed and replaced with another disk.
True
182T or F: Because data are striped in very small strips, RAID 3 cannot achieve very high data transfer rates.
False
183RAID level ________ has the highest disk overhead of all RAID types.
1
184Greater ability to withstand shock and damage, improvement in the uniformity of the magnet film surface to increase disk reliability, and a significant reduction in overall surface defects to help reduce read-write errors, are all benefits of ___________.
Glass Substrate
185T or F: Flash memory becomes unusable after a certain number of writes.
True
186T or F: RAID level 0 is not a true member of the RAID family because it does not include redundancy to improve performance.
True
187Adjacent tracks are separated by _________.
Gaps
188T or F: The SSDs now on the market use a type of semiconductor memory referred to as flash memory.
True
189T or F: The head must generate or sense an electromagnetic field of sufficient magnitude to write and read properly.
True
190T or F: Magnetic disks are the foundation of external memory on virtually all computer systems.
True
191In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly universal sector size.
512
192Data are transferred to and from the disk in __________.
Sectors
193T or F: The transfer time to or from the disk does not depend on the rotation speed of the disk.
False
194T or F: There are typically hundreds of sectors per track and they may be either fixed or variable lengths.
True
195A _________ is a high-definition video disk that can store 25 Gbytes on a single layer on a single side.
BluRay DVD
196When the magnetizable coating is applied to both sides of the platter the disk is then referred to as _________.
DVD
197__________ is the standardized scheme for multiple-disk database design.
RAID
198________ is when the disk rotates more slowly for accesses near the outer edge than for those near the center.
Constant linear velocity (CLV)
199The set of all the tracks in the same relative position on the platter is referred to as a _________.
Cylinder
200T or F: SSD performance has a tendency to speed up as the device is used.
false
201T or F: During a read or write operation, the head rotates while the platter beneath it stays stationary.
False
202The sum of the seek time and the rotational delay equals the _________, which is the time it takes to get into position to read or write.
Access Time
203T or F: A bit near the center of a rotating disk travels past a fixed point slower than a bit on the outside.
True
204T or F: RAID is a set of physical disk drives viewed by the operating system as a single logical drive.
True
205Scanning information at the same rate by rotating the disk at a fixed speed is known as the _________.
Constant Angular Velocity
206T or F: The disadvantage of using CAV is that individual blocks of data can only be directly addressed by track and sector.
False
207A __________ disk is permanently mounted in the disk drive, such as the hard disk in a personal computer.
Non removeable