Computer Organization

Arithmetic Mean

A Thunderbolt compatible peripheral interface is no more complex than that of a simple USB device.

The Thunderbolt protocol _________ layer is responsible for link maintenance including hot-plug detection and data encoding to provide highly efficient data transfer.

MIPS (millions of instructions per second)

Harmonic Mean

Access Time

EAT (Effective Access Time)

Raid Value Finding

Both the structure and functioning of a computer are, in essence, simple.

The number of bits used to represent various data types is an example of an architectural attribute.

Interfaces between the computer and peripherals are an example of an organizational attribute.

The hierarchical nature of complex systems is essential to both their design and their description.

An I/O device is referred to as a __________.

The _________ stores data.

Computer organization refers to attributes of a system visible to the programmer.

A common example of system interconnection is by means of a __________.

_________ attributes include hardware details transparent to the programmer.

A computer must be able to process, store, move, and control data.

A microcomputer architecture and organization relationship is not very close.

When data are moved over longer distances, to or from a remote device, the process is known as data transport.

The __________ performs the computer's data processing functions.

Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.

It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.

A _________ is a mechanism that provides for communication among CPU, main memory, and I/O.

A __________ system is a set of interrelated subsystems.

_________ provide storage internal to the CPU.

When data are moved over longer distances, to or from a remote device, the process is known as __________.

A particular architecture may span many years and encompass a number of different computer models, its organization changing with changing technology.

Changes in computer technology are finally slowing down.

Changes in technology not only influence organizations but also result in the introduction of more powerful and complex architectures.

Both the structure and functioning of a computer are, in essence, simple.

The __________ moves data between the computer and its external environment.

Architectural attributes include __________.

Historically the distinction between architecture and organization has not been an important one.

It is a(n) _________ design issue whether a computer will have multiple instructions.

A computer organization does not need to be designed to implement a particular architectural specification.

A computer is a complex system.

Computer technology is changing at a __________ pace.

Processors are so inexpensive that we now have microprocessors we throw away.

Measures such as MIPS and MFLOPS have proven adequate for evaluating the performance of processors.

Superscalar execution is the same principle as seen in an assembly line.

The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.

The best-known of the SPEC benchmark suites is __________.

Raw speed is far more important than how a processor performs when executing a given application.

Multiple parallel pipelines are used in __________.

The __________ measures the ability of a computer to complete a single task.

A common measure of performance for a processor is the rate at which instructions are executed, expressed as millions of instructions per second (MIPS).

A measurement of how many tasks a computer can accomplish in a certain amount of time is called a(n) __________.

Designers wrestle with the challenge of balancing processor performance with that of the main memory and other computer components.

The raw speed of the microprocessor will not achieve its potential unless it is fed a constant stream of work to do in the form of computer instructions.

One increment, or pulse, of a clock, is referred to as a __________.

A straight comparison of clock speeds on different processors tells the whole story about performance.

Branch prediction potentially increases the amount of work available for the processor to execute.

The interface between the processor and ___________ is the most crucial pathway in the entire computer because it is responsible for carrying a constant flow of program instructions and data between memory chips and the processor.

The cache holds recently accessed data.

__________ law deals with the potential speedup of a program using multiple processors compared to a single processor.

An increase in clock rate means that individual operations are executed _____.

___________ potentially increases the amount of work available for the processor to execute.

The desktop application(s) that require the great power of today's microprocessor-based systems include___________.

The __________ is a relatively small fast memory interposed between a larger, slower memory and the logic that accesses the larger memory.

A __________ is a core designed to perform parallel operations on graphics data.

A(n) __________ Mean is a good candidate for comparing the execution time performance of several systems.

Workstation systems cannot support highly sophisticated engineering and scientific applications.

Year by year the cost of computer systems continues to rise.

The IAS is the prototype of all subsequent general-purpose computers.

With respect to changes in values, the __________ Mean gives equal weight to all of the values in the data set.

Cloud service providers use massive high-performance banks of servers to satisfy high-volume, high-transaction-rate applications for a broad spectrum of clients.

Operations performed by a processor, such as fetching an instruction, decoding the instruction, performing an arithmetic operation, and so on, are governed by a system clock.

The __________ are used to designate the source or destination of the data on the data bus.

Because all devices on a synchronous bus are tied to a fixed clock rate, the system cannot take advantage of advances in device performance.

With asynchronous timing the occurrence of events on the bus is determined by a clock.

Interrupts do not improve processing efficiency.

Computer systems contain a number of different buses that provide pathways between components at various levels of the computer system hierarchy.

The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.

A key requirement for PCIe is the high capacity to support the needs of higher data rate I/O devices such as Gigabit Ethernet.

An I/O module cannot exchange data directly with the processor.

Timing refers to the way in which events are coordinated on the bus.

The processing required for a single instruction is called a(n) __________ cycle.

A(n) _________ is generated by a failure such as power failure or memory parity error.

The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects.

The basic function of a computer is to execute programs.

Each data path consists of a pair of wires (referred to as a __________ ) that transmits data one bit at a time.

It is not possible to connect I/O controllers directly onto the system bus.

The von Neumann architecture is based on which concept?

A bus that connects major computer components (processor, memory, I/O) is called a __________.

A sequence of codes or instructions is called __________.

The data lines provide a path for moving data among system modules and are collectively called the _________.

The interconnection structure must support which transfer?

A __________ is the high-level set of rules for exchanging packets of data between devices.

Program execution consists of repeating the process of instruction fetch and instruction execution.

Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton.

The unit of transfer at the link layer is a phit and the unit transfer at the physical layer is a flit.

A key characteristic of a bus is that it is not a shared transmission medium.

A(n) _________ is generated by some condition that occurs as a result of an instruction execution.

In general, the more devices attached to the bus, the greater the bus length and hence the greater the propagation delay.

The method of using the same lines for multiple purposes is known as time multiplexing.

At the top level, a computer consists of CPU, memory, and I/O components.

The TL supports which of the following address spaces?

__________ memory is the principal internal memory system of the computer.

When instruction execution involves fetching the instruction from memory and, during execution, accessing one or more data operands from one or more regions of memory, there is a dual locality of data spatial locality and instruction spatial locality.

Principle of locality is also referred to as the locality of reference.

For cache memory, _________ locality is traditionally exploited by keeping re-cently used instruction and data values in cache memory and by exploiting a cache hierarchy.

Computer memory exhibits perhaps the widest range of type, technology, organization, performance, and cost of any feature of a computer system.

_________ locality is generally exploited by using larger cache blocks and by fetching items of anticipated use into the cache control logic.

The term __________ refers to whether memory is internal or external to the computer.

Internal and external memory capacity it typically expressed in terms of bytes.

__________ memory consists of peripheral storage devices that are accessible to the processor via I/O controllers.

__________ refers to when an instruction is fetched from a unit of memory, it is likely that in the near future additional instructions will be fetched from that same memory unit.

One assertion that locality is based on is that as a function of time, the prob-ability that a given unit of memory is referenced tends to change __________.

Intuitively, the principle of locality makes sense.

_________ is a method of accessing units of data in which the access must be made in a specific linear sequence.

External memory subsystems are directly accessible by the processor.

For random access memory, __________ is the time from the instant that an address is presented to the memory to the instant that data have been stored or made available for use.

__________ is a random access type of memory that enables one to make a comparison of desired bit locations within a word for a specified match, and to do this for all words simultaneously.

Many programs exhibit both temporal and spatial locality for both instruction and data access.

A distinction among memory types is the method of accessing units of data.

Cache is a form of external memory.

The principle of locality reflects the observation that memory references by the processor tend to cluster for instructions but not for data.

For internal memory, the unit of transfer is equal to the number of electrical lines into and out of the memory module.

__________ refers to when a data location is accessed, it is likely that in the near future additional instructions will be fetched from that same memory unit.

Locality is based on the assertion that the correlation between immediate past and immediate future memory reference patterns is low, and increases as the time interval increases.

Locality of __________ has a profound influence on both the organization of memory and on operating system memory management software.

It has been found that data access patterns generally show a greater variance than instruction access patterns.

__________ location reflects the tendency of a program to access data locations sequentially, such as when processing a table of data.

One of the assertions that locality is based on is that during any interval of time, a program references memory locations non-uniformly.

A typical computer system is equipped with a hierarchy of memory subsystems, some internal to the system and some external.

__________ is a design principle which means that copies of the same data unit in adjacent memory levels must be consistent.

For main memory, __________ is the number of bits read out of or written into memory at a time.

_________ is the minimum unit of transfer between cache and main memory.

There is an additional time element for comparing tag fields for both associative and set-associative caches.

The length of a line, not including tag and control bits, is the line size.

_________ is a portion of a cache line that is used for addressing purposes.

The main disadvantage of the write through technique is that it generates substantial memory traffic and may create a bottleneck.

The __________ policy dictates that a piece of data in one cache is guaranteed to be also found in all lower levels of caches.

Victim cache was originally proposed as an approach to reduce the conflict misses of direct mapped caches without affecting its fast access time.

The _________ policy dictates that a piece of data in one cache is guaranteed not to be found in all lower levels of caches.

The __________ cache is slower and typically larger than the L2 cache

Cache design for high-performance computing is the same as it is for other hardware platforms and applications.

The evolution of cache organization is seen clearly in the evolution of Intel microprocessors.

The key advantage of the split cache design is that it eliminates contention for the cache between the instruction fetch/decode unit and the execution unit.

One of the disadvantages of a direct-mapped cache is that it allows simple and fast speculation.

A logical cache stores data using virtual addresses.

The _________ execute micro-operations, fetching the required data from the L1 data cache and temporarily storing results in registers.

If a program happens to reference words repeatedly from two different blocks that map into the same line, the blocks will be continually swapped in the cache, and the hit ratio will be low, is a phenomenon known as __________.

With __________ additional hardware is used to ensure that all updates to main memory via cache are reflected in all caches.

The __________ replacement algorithm replaces the block in the set that has been in the cache longest with no reference to it.

FIFO is the most popular replacement algorithm.

__________ is easily implemented as a round-robin or circular buffer technique.

With the exception of smaller embedded systems, all modern computer systems employ one or more layers of cache memory.

The L1 cache is slower and typically larger than the L2 cache.

The principal disadvantage of _________ mapping is the complex circuitry required to examine the tags of all cache lines in parallel.

The _________ replacement algorithm replaces the block in the set that has been in the cache longest.

Associative mapping overcomes the disadvantage of direct mapping by permitting each main memory block to be loaded into any line of the cache.

The __________ fetches program instructions in order from the L2 cache, decodes these into a series of micro-operations, and stores the results in the L1 instruction cache.

The direct mapping technique is simple and inexpensive to implement.

The cache contains a copy of portions of the main memory.

The simplest technique for logically organizing cache is __________.

A number of chips can be grouped together to form a memory bank.

The two traditional forms of RAM used in computers are DRAM and SRAM.

With __________ the data transfer is synchronized to both the rising and falling edge of the clock, rather than just the rising edge.

The advantage of RAM is that the data or program is permanently in main memory and need never be loaded from a secondary storage device.

A __________ contains a permanent pattern of data that cannot be changed, is nonvolatile, and cannot have new data written into it.

Nonvolatile means that power must be continuously supplied to the memory to preserve the bit values.

NOR memory is better suited for external memory such as USB flash drives and memory cards.

All DRAMs require a refresh operation.

One distinguishing characteristic of memory that is designated as _________ is that it is possible to both read data from the memory and to write new data into the memory easily and rapidly.

__________ increases the data transfer rate by increasing the operational frequency of the RAM chip and by increasing the prefetch buffer from 2 bits to 4 bits per chip.

__________ can be caused by harsh environmental abuse, manufacturing defects, and wear.

Flash memory is only used for internal memory applications.

Theoretically, a DDR module can transfer data at a clock rate in the range of __________ Mbps.

__________ is a good candidate to replace or supplement DRAM for main memory.

DRAM is much costlier than SRAM.

A characteristic of ROM is that it is volatile.

The _________ exchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without imposing wait states.

Semiconductor memory comes in packaged chips.

RAM must be provided with a constant power supply.

The SDRAM performs best when it is transferring large blocks of data sequentially such as for word processing, spreadsheets, and multimedia.

_________ can be caused by power supply problems or alpha particles.

With _________ the microchip is organized so that a section of memory cells are erased in a single action.

A DDR3 module transfers data at a clock rate of __________ Mbps.

A static RAM will hold its data as long as power is supplied to it.

In a _________, binary values are stored using traditional flip-flop logic-gate configurations.

________ increases the prefetch buffer size to 8 bits.

An error-correcting code enhances the reliability of the memory at the cost of added complexity

The basic element of a semiconductor memory is the memory cell

The width of a track is double that of the head.

The disadvantage of _________ is that the amount of data that can be stored on the long outer tracks is only the same as what can be stored on the short inner tracks.

The areas between pits are called _________.

A removable disk can be removed and replaced with another disk.

Because data are striped in very small strips, RAID 3 cannot achieve very high data transfer rates.

RAID level ________ has the highest disk overhead of all RAID types.

Greater ability to withstand shock and damage, improvement in the uniformity of the magnet film surface to increase disk reliability, and a significant reduction in overall surface defects to help reduce read-write errors, are all benefits of ___________.

Flash memory becomes unusable after a certain number of writes.

RAID level 0 is not a true member of the RAID family because it does not include redundancy to improve performance.

Adjacent tracks are separated by _________.

The SSDs now on the market use a type of semiconductor memory referred to as flash memory.

The head must generate or sense an electromagnetic field of sufficient magnitude to write and read properly.

Magnetic disks are the foundation of external memory on virtually all computer systems.

In most contemporary systems fixed-length sectors are used, with _________ bytes being the nearly universal sector size.

Data are transferred to and from the disk in __________.

The transfer time to or from the disk does not depend on the rotation speed of the disk.

There are typically hundreds of sectors per track and they may be either fixed or variable lengths.

A _________ is a high-definition video disk that can store 25 Gbytes on a single layer on a single side.

When the magnetizable coating is applied to both sides of the platter the disk is then referred to as _________.

__________ is the standardized scheme for multiple-disk database design.

________ is when the disk rotates more slowly for accesses near the outer edge than for those near the center.

The set of all the tracks in the same relative position on the platter is referred to as a _________.

SSD performance has a tendency to speed up as the device is used.

During a read or write operation, the head rotates while the platter beneath it stays stationary.

The sum of the seek time and the rotational delay equals the _________, which is the time it takes to get into position to read or write.

A bit near the center of a rotating disk travels past a fixed point slower than a bit on the outside.

RAID is a set of physical disk drives viewed by the operating system as a single logical drive.

Scanning information at the same rate by rotating the disk at a fixed speed is known as the _________.

The disadvantage of using CAV is that individual blocks of data can only be directly addressed by track and sector.

A __________ disk is permanently mounted in the disk drive, such as the hard disk in a personal computer.