CAO LAB son
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1
ALU
Performs arithmetic, logical, and comparison operations
2
Control Unit (CU)
Controls and coordinates all CPU operations
3
Program Counter (PC)
Holds the address of the next instruction
4
Instruction Register (IR)
Stores the current instruction
5
Accumulator (ACC)
Stores intermediate results
6
Instruction Cycle
The step-by-step process the CPU follows to execute a program
7
Fetch
Retrieves the instruction from memory using the Program Counter
8
Decode
The Control Unit interprets the instruction and determines the operation and operands
9
Execute
The ALU performs the required operation
10
Pipelining
Overlaps multiple instructions during execution to increase throughput
11
Pipeline Hazards
Data hazard, control hazard, and structural hazard
12
Superscalar Execution
Executes two or more instructions per clock cycle
13
Memory Hierarchy
Registers → Cache → Main Memory → Secondary Storage
14
Registers
Fastest and smallest storage in the memory hierarchy
15
Cache
Small high-speed memory between the CPU and RAM that stores frequently used data
16
L1 Cache
Fastest and smallest cache level
17
Main Memory
Volatile memory that stores currently running programs
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Secondary Storage
Long-term non-volatile storage such as HDD and SSD
19
Von Neumann Architecture
Uses one memory and one bus for both instructions and data
20
Harvard Architecture
Uses separate memories and buses for instructions and data
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Modified Harvard Architecture
Architecture used by most modern systems according to the lesson
22
Access Time
Time required to read or write data from memory
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Latency
Delay between a request and the start of data transfer
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Cache Hit Rate
Percentage of memory requests successfully found in cache
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Miss Rate
1 minus the cache hit rate
26
AMAT
Average Memory Access Time
27
2's Complement
Important in performing binary arithmetic operations
28
Binary Arithmetic
Binary addition and subtraction used in computer systems and digital devices
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