1 A communication pathway that connects the MPU with memory and I/O devices.
System bus in a microprocessor system
2Why are buses compared to highways?
Because they carry addresses, data, and control signals between system components.
3 A set of control signal lines used to provide timing and synchronization between the MPU and peripherals.
Control bus
4What is the direction of the control bus?
Unidirectional, from the MPU to memory and I/O devices.
5 It enables or activates specific memory or I/O devices at the correct time.
Control bus
6 Timing signals that synchronize MPU operations and control execution speed.
Clock signals
7Why is the MPU described as a complex timer?
Because it executes instructions based on precise clock intervals.
8What happens if clock signals are absent?
The MPU cannot coordinate or execute operations correctly.
9A technology that allows many MPU functions to be integrated into a single chip.
Large-Scale Integration (LSI)
10What is the advantage of LSI technology in microprocessors?
Reduced size, increased reliability, and improved performance.
11What is the address capacity formula of an MPU?
The number of memory locations equals 2ⁿ, where n is the number of address lines.
12How many memory locations can an MPU access with n address lines?
2ⁿ memory locations.
13How many memory locations are accessible with a 20-bit address bus using the formula?
2²⁰ = 1,048,576 locations (1 MB).
14They allow the MPU to respond to peripheral requests.
Request acknowledge signals in MPU operation
15 They allow peripherals to interrupt or request services from the MPU.
External request lines
16What basic cycle does an MPU follow during operation?
Fetch, Decode, and Execute.
17Why does the MPU communicate with memory and I/O devices?
To fetch instructions, store data, and exchange input/output information.
18What are the four program-initiated operations of an MPU?
Memory Read, Memory Write, I/O Read, and I/O Write.
19 The operation where the MPU reads instructions or data from memory.
Memory Read (MR)
20 The operation where the MPU writes data into memory.
Memory Write (MW)
21 The operation where the MPU accepts data from an input device.
I/O Read (IOR)
22 The operation where the MPU sends data to an output device.
I/O Write (IOW)
23What are the basic steps in MPU communication with memory or I/O devices?
Identifying the address, transferring binary data, and providing timing or synchronization signals.
24 A set of lines used by the MPU to identify memory locations or peripherals.
Address bus
25What is the direction of data flow in the address bus?
Unidirectional, from the MPU to memory or I/O devices.
26How are address bus lines labeled?
A₀ to Aₘ.
27How many memory locations can a 12-bit address bus access?
4,096 locations.
28How many memory locations can a 16-bit address bus access?
65,536 locations (64 KB).
29How many memory locations can a 20-bit address bus access?
1,048,576 locations (1 MB).
30How many memory locations can a 23-bit address bus access?
8,388,608 locations (8 MB).
31 A set of lines used to transfer data between the MPU and memory or I/O devices.
Data bus
32What is the direction of data flow in the data bus?
Bidirectional.
33How are data bus lines labeled?
D₀ to Dₙ.
34Why is the size of the data bus important?
It determines how much data can be transferred at once and affects performance.
35Which microprocessors use an 8-bit data bus?
8085, Z80, and 6800.
36Which microprocessors use a 16-bit data bus?
8086, Z8000, and 68000.
37Individual signal lines generated by the MPU to indicate its operations and manage timing.
Control signals
38To enable or activate memory and I/O devices at the correct time.
Control signals
39Enables memory to send data or instructions to the MPU.
Memory Read (MR) control signal
40Enables memory to store data from the MPU.
Memory Write (MW) control signal
41Enables an input device to send data to the MPU.
I/O Read (IOR) control signal
42Enables an output device to receive data from the MPU.
I/O Write (IOW) control signal
43Operations where MPU activity is interrupted or delayed by external signals.
Externally initiated operations
44An external signal that restarts MPU operation from the beginning.
Reset operation
45A signal that temporarily stops the current process to handle a critical task.
Interrupt
46A delay introduced when memory or peripherals are slower than the MPU.
Wait operation
47A request from a peripheral to control the buses for faster data transfer.
Bus request
48Which device commonly uses bus request signals?
Direct Memory Access (DMA) controllers.
49Why does the MPU need clock signals?
To control timing and synchronize internal and external operations.
50Why does the MPU require electrical power?
To operate internal circuits and logic components.
51What technological advancement allowed most MPU functions to be placed on a single chip?
Large-Scale Integration (LSI).
52What is special about the Z80 microprocessor regarding MPU signals?
It includes most MPU signals except internal clock generation.
53Stage where the MPU places an address on the address bus and reads the instruction via the data bus.
Fetch stage of instruction execution
54What component holds and increments memory addresses during instruction fetch?
Registers acting as memory pointers.
55Stage where the instruction is interpreted to determine its type and required operation.
Decode stage
56Which component decodes binary instructions?
The instruction decoder.
57Stage where the MPU performs data transfer, arithmetic, logic, or decision-making operations.
Execute stage
58Which unit performs arithmetic and logic operations?
The Arithmetic Logic Unit (ALU).
59 To store and manipulate binary data.
Registers in an MPU
60Registers that hold memory addresses.
Memory pointer registers
61 Indicators that show data conditions for decision-making.
Flags (flip-flops)