CompArch Ch. 17 Review

A taxonomy first introduced by _______ is still the most common way of categorizing systems with parallel processing capability.
a. Randolph
b. Flynn
c. von Neuman
d. Desai

Uniprocessors fall into the _______ category of computer systems.
a. MIMD
b. SIMD
c. SISD
d. MISD

Vector and array processors fall into the ________ category of computer systems.
a. SIMD
b. SISD
c. MISD
d. MIMD

SMPs, clusters, and NUMA systems fit into the ________ category of computer systems.
a. SISD
b. MIMD
c. SIMD
d. MISD

A _________ problem arises when multiple copies of the same data can exist in different caches simultaneously, and if processors are allowed to update their own copies freely, an inconsistent view of memory can result.
a. cache coherence
b. cluster
c. failover
d. failback

Hardware-based solutions are generally referred to as cache coherence _______.
a. clusters
b. streams
c. protocols
d. vectors

A __________ is an instance of a program running on a computer.
a. process
b. process switch
c. thread
d. thread switch

A ________ is a dispatchable unit of work within a process that includes a processor context and its own data area for a stack.
a. process
b. process switch
c. thread
d. thread switch

Replicating the entire processor on a single chip with each processor handling separate threads is _________.
a. interleaved multithreading
b. blocked multithreading
c. simultaneous multithreading
d. chip multiprocessing

rscalar
b. single-threaded scalar
c. blocked multithreaded scalar
d. interleaved multithreaded scalar

_________ causes results issuing from one functional unit to be fed immediately into another functional unit and so on.
a. Chaining
b. Rollover
c. Passive standby
d. Pipelining

The ________ contains control fields, such as the vector count, that determine how many elements in the vector registers are to be processed.
a. vector-mask register
b. vector-activity count
c. vector-status register
d. vector-instruction register

Which of the following is an approach to vector computation?
a. pipelined ALU
b. parallel ALU's
c. parallel processors
d. all of the above

An operation that switches the processor from one process to another by saving all the process control data, register, and other information for the first and replacing them with the process information for the second is:
a. resource ownership switch
b. process switch
c. thread switch
d. cluster switch

With ________ instructions are simultaneously issued from multiple threads to the execution units of a superscalar processor.
a. SMT
b. single-threaded scalar
c. coarse-grained multithreading
d. chip multiprocessing