Chapter 9

Processing speed or program execution
- Determined primarily by ability of I/O operations to stay ahead of processor
input --> process --> output

1. Means for addressing different peripheral devices
2. A way for peripheral devices to initiate communication with the CPU
3. An efficient means of transferring data directly between I/O and memory for large data transfers since programmed I/O is suitable only for slow devices and individual word transfers
4. Buses that interconnect high-speed I/O devices with the computer must support high data transfer rates
5. Capability of handling devices operating at varying speeds with varying delays
6. Means for handling devices with extremely different control requirements

Needed because:
- Different formats required by the devices
- Incompatibilities in speed between the devices and the CPU that make synchronization difficult
- Bursts of data vs. streaming data
- Device control requirements that would tie up too much CPU time

characteristics slide 6

CPU-I/O Controller-I/O device

complex slide 8

1. Programmed I/O
- CPU controlled I/O
2. Interrupt Driven I/O (ie. illegal instructions, multitasking)
- External input controls
3. Direct Memory Access Controllers
- Method for transferring data between main memory and a device that bypasses the CPU

Slide 9 more explaination

Simplest method for performing I/O
I/O data and address registers in CPU
One word transfer per I/O instruction
Address information for each I/O device
- LMC I/O capability for 100 devices
Full instruction fetch/execute cycle
Primary use:
- Keyboards
- Communication with I/O controllers (see DMA)

example slide 11

Signal that causes the CPU to alter its normal flow of instruction execution
- Frees CPU from waiting for events
- Provides control for external I/O initiation

Interrupt lines (hardware)
- One or more special control lines to the CPU
Interrupt request
Interrupt handlers
- Program that services the interrupt
- Also known as an interrupt routine or device driver
Context
- Saved registers of a program before control is transferred to the interrupt handler
- Allows program to resume exactly where it left off when control returns to interrupted program

1. Notify that an external event has occurred
2. Signal completion
3. Allocate CPU time
4. Indicate abnormal event (CPU originates for notification and recovery)

1. Lower priority interrupts are held until higher priority interrupts are complete
2. Suspend program in progress
3. Save context, including last instruction executed and data values in registers, in the PCB or the stack area in memory
4. Branch to interrupt handler program

1. Questions when an interrupt occurs
2. Vectored interrupt
3. Polling

- Transferring large blocks of data
- Direct transfer to and from memory
- CPU not actively involved in transfer itself
- Required conditions for DMA

1. Application program requests I/O service from operating system
2. To initiate DMA, programmed I/O is used to send
the following information:
- Location of data on I/O device
- Starting location in memory
- Size of the block
- Direction of transfer: read or write
3. Interrupt to CPU upon completion of DMA

- Recognizes messages from device(s) addressed to it and accepts commands from the CPU
- Provides a buffer where the data from memory can be held until it can be transferred to the device
- Provides the necessary registers and controls to perform a direct memory transfer.
- This requires that the I/O controller have access to a memory address register and a memory data register separate from those of the CPU, either within the disk controller or as a separate DMA controller.
- Physically controls the device
- Copies data from its buffer to the device/from the CPU to its buffer
- Communicates with CPU

image slide 29

Controller can be designed to provide specialized control for a device
- Control of several different I/O devices can occur simultaneously
- The CPU is freed to perform other tasks while much slower I/O operations are taking place.
- Processor-based controllers can offload time-consuming CPU-intensive work. Examples:
- High-end graphics display controller
- Mainframe channel subsystems

The physical connection that makes it possible to transfer data from one location in the computer system to another
- Group of electrical or optical conductors for carrying signals from one location to another
- Wires or conductors printed on a circuit board
- Line: each conductor in the bus
4 kinds of signals carried in a line
1. Data
2. Addressing
3. Control signals
4. Power (sometimes)

- Number of separate wires or conductors
- Data width in bits carried simultaneously
- Addressing capacity
- Lines on the bus are for a single type of signal or shared
- Throughput – data transfer rate in bits per second
- Distance between two endpoints
- Number and type of attachments supported
- Type of control required
- Defined purpose
- Features and capabilities

1. Parallel vs. serial buses
2. Direction of transmission
- Simplex – unidirectional
- Half duplex – bidirectional, one direction at a time
- Full duplex – bidirectional simultaneously
3. Method of interconnection
- Point-to-point – single source to single destination
- Cables – point-to-point buses that connect to an external device
- Multipoint bus – also broadcast bus or multidrop bus
- Connect multiple points to one another
- Addressing normally required