Week 7 - Computer Buses and Pipelining

A bus is a shared communication link that carries signals (data, address, control, and power) between components in a computer system.

Data lines, Address lines, Control lines, Power lines

It carries data from one place to another in the system.

It specifies the recipient (memory location or I/O device) for data.

It synchronizes and controls the operations of the bus and connected devices.

It provides electrical power to components connected to the bus.

Point-To-Point connects a specific source to a specific destination; Multipoint connects to several destinations and requires addressing.

A port that connects directly to a device like a printer.

Ethernet

It connects the CPU with memory and I/O modules within the same computer system.

It defines the meaning and behavior of each bus line and signal for communication between components.

A technique where multiple instruction stages are overlapped to improve performance and reduce execution time.

When two instructions access the same data simultaneously, causing conflicts and pipeline stalls.

When a branch instruction changes the flow, preloaded instructions may be discarded, causing delays.

Using hardware interlocks or operand forwarding to manage instruction timing and data availability.

It detects dependencies and stalls the pipeline until data is available.

It sends the result of one instruction directly to the next, bypassing memory.

Using delayed load, where compilers insert unrelated instructions after a load to fill the gap.

Separate pipelines, branch prediction, using independent instructions, or instruction reordering.

A probabilistic method of guessing the branch path and loading instructions accordingly.

The pipeline is flushed and reloaded, causing a performance penalty.

Changing instruction order (by compiler or CPU) to reduce stalls and handle dependencies.

A technique where multiple instructions are reordered and executed in parallel to boost performance.